Baloney Alert Special Report: Derating Guidelines
Posted by DACI1
DACI Newsletter Classics
Valuable lessons from our 1st Qtr 2006 Newsletter
Many engineering departments don’t allow design engineers to operate parts anywhere near specification limits. This policy is spelled out in a Derating Guidelines document that mandates greatly reduced stress levels. For example, a typical derating for resistor power is 50%, which means that the design engineer can’t apply more than 1/4W to a 1/2W resistor. This Special Report asks the simple question: Why not?
Why Can’t Designers Use Maximum Ratings?
Is it because design managers are paranoid? Have they found that when a vendor claims a resistor will work to 1/2W that the resistor will only work to 1/4W? Or how about semiconductor junction temperatures? A typical power diode for example might be rated at 150C, but the designer often must adhere to a derating rule that prohibits a junction temperature greater than 90C. Does this mean that design managers consider power diode vendors to be just as untrustworthy as resistor vendors?
Or could it be that design managers don’t have faith in their design engineers? Are derating factors just a tactful way of applying fudge factors to account for the math errors made by those lazy and sloppy designers?
Although the above hypotheses may be applicable for a few managers, most often the stated rationale for deratings is “improved reliability.”
But do derating guidelines actually deliver this benefit? Please read on.
Costly Overdesign due to Excessive Caution
First let’s assume that vendors provide components that, the great majority of the time, will meet their specifications. (If not, in our efficient capitalist system they would be justly faced with lawsuits and loss of business and bankruptcy.)
Next, let’s assume that design engineers do a pretty good job in predicting worst case application stresses, taking into consideration the effects of tolerances, including aging. (If not they would rapidly be seeking employment in other fields.)
What about transient conditions? Again, competent design engineers will consider peak transient stresses as well as steady-state stresses, and select components accordingly. Or more likely, they will include clamps and filters and other forms of protection to ensure that maximum transient stresses are safely limited.
Okay, what’s left? Not much, other than uncertainties in the analytical models. But such uncertainties are minimized by a comparison of predicted results to prototype test results (a step that all good design engineers insist on).
So here’s the question: How much smaller than unity does a stress ratio need to be to account for such small remaining uncertainties?
A Typical Real World Example
For example, consider a resistor that has a predicted maximum power dissipation of 0.7W and a rating of 1W. Its stress ratio SR is
SR = Predicted / Rated = 0.7 / 1 = 0.7
With worst case tolerances and transients and testing considered, the designer — applying judgment based on experience — believes that a 10% uncertainty is ample, and that the maximum allowable SR should be 0.9. Therefore the designer is pleased with a ratio of 0.7. Plus, the designer knows that the 0.7 maximum is out in the tail of the distribution and that on average the stress will be much lower.
But the designer checks the department’s sacred Derating Guidelines and finds that the allowable stress ratio is only 0.5. Will the designer have a good laugh and leave the design alone and move on to more important tasks? Of course not!
Faced with an upcoming Design Review where some junior reliability engineer would gleefully jump all over this supposedly egregious violation of good design practice, the designer will avoid such embarrassment and spend extra time updating the design to a 2W resistor. Although this will make the design larger/heavier and more costly, with no measurable improvement in quality or reliability, the Derating Gods must not be offended.
Derating Cookbooks Can Cause Design Poisoning
Using a Derating Guidelines cookbook that was developed without support of science-based reasoning can easily result in design poisoning. For example, arbitrary temperature deratings can result in the use of much heavier heat sinks than are really necessary, and such added weight is almost universally a bad thing in a product. The useless extra weight not only takes up valuable space and costs more, but it requires more energy to transport (a particularly unfortunate result for fuel-sensitive aircraft applications). Worse, if the mandated derating forces the designer to shift from simple convection cooling to the use of fans or a liquid cooling pump, then overall reliability will very likely be significantly reduced.
Another major problem with the cookbook approach is that it discourages thinking. An engineering cookbook by definition is supposed to be a tried and true collection of guidelines and rules to assist the designer. Therefore the designer is discouraged from thinking about the aspects of the design that are covered by the cookbook. In theory this is not too bad if the cookbook is regularly updated using a science-based review process.
But has anyone ever read any science-based report that supports the typical cobweb-encrusted Derating Guidelines document  used by many engineering firms? And if by chance such a report is stumbled upon in the engineering department’s dusty attic, has it been updated to keep pace with technology?
Note 1: Subtitle: “This is the way grandpa did it and by God this is the way we’re going to do it!”
Oversimplification Misses Key Concerns
Returning to our resistor power example, savvy designers know that resistor power is really an approximate proxy for resistor temperature. For low-wattage resistor applications this is reasonable because resistor temperature rise is negligible. But as resistor dissipation increases, particularly with today’s ever-shrinking packages, resistor temperature can become a serious concern. One does not want a resistor to desolder itself from the PWA, even if the resistor is operated within its allowable stress derating. But do the derating guidelines for your department address resistor temperatures? Or temperature-related solder degradation issues?
A similar point can be made for capacitor ripple currents, which are also approximate proxies for capacitor core temperatures. Do your derating guidelines mention capacitor core temperatures?
And whereas decades ago the effects of electromigration due to integrated circuit current densities were a valid concern (which may have justified an associated temperature derating), advances in processes over the years have made such deratings obsolete — almost. Today there is renewed concern with electromigration due to advanced miniaturization.
So, like Dad’s old suspenders that were out of fashion for thirty years and then came back into vogue, our old neglected Derating Guidelines might just be partially right every few decades, if only by accident.
The hallmark of science is testability. If someone makes an assertion they are obligated to prove the assertion in a manner that can be replicated by independent observers. If you suspect that your engineering department’s deratings policy is archaic, why not challenge it? Ask the powers-that-be to defend the policy with objective evidence. If they can’t provide such evidence then it’s time for a change.
By helping modernize your deratings policy you can save your company time and money, plus simultaneously improve product reliability — an impressive outcome.